In 1985, I obtained a degree in electronics engineering at the Catholic University of Leuven, Belgium. After graduating, I worked as a research assistant at the Inter-university Micro-Electronics Center (IMEC) in Leuven, Belgium, from 1985 to 1988, and at the University of São Paulo, Brazil, from 1988 to 1990.

From 1990 to 1991, I worked at Alcatel Bell in Antwerp, Belgium as a design engineer of broadband telecommunications ASICs. From this period dates my first experience with logic synthesis and the RTL design methodology.

In 1992, I co-founded Easics, a hardware design services company. At Easics, I have been responsible for design methodology and in-house tool development. In May 2000, Easics was acquired by TranSwitch, a supplier of VLSI solutions to the communications equipment industry. In November 2002, I left Easics to become an independent developer and consultant. In 2005, a team of employees acquired Easics through an MBO and I became a director of the company again.

Since 2006 I am working as a business development and technical consultant for start-up companies. In 2006 I co-founded Mephisto Design Automation, a company that developed an advanced analog design automation tool. Since 2008 I am working with Sigasi, a company that makes a modern VHDL design productivity tool.

Furthermore, I am the creator and maintainer of MyHDL, an open-source package to use Python as a Hardware Description Language.